電気電子情報工学科

Toshio Kumamoto

  (熊本 敏夫)

Profile Information

Affiliation
Professor, Faculty of Engineering, Department of Electrical, Electronic and Information Engineering, Osaka Sangyo University
Degree
博士(工学)(大阪府立大学)

Researcher number
70737048
J-GLOBAL ID
202001005961997184
researchmap Member ID
R000008092

Papers

 14
  • Shota Ueguchi, Mitsuhiko Nagao, Toshio Kumamoto, Masayoshi Shirahata, Takeshi Kumaki, Takeshi Fujino
    Journal of Signal Processing, Vol.20(No.4) pp.133-136, Jul, 2016  Peer-reviewed
    赤外線サーモパイル型アレイセンサの出力を低消費電力で読み出す二重積分型アナログ フロントエンド回路を提案した.精度劣化を引き起こす初段のV/I(電圧電流)変換器の オフセット電圧を,その出力側で補正するオートゼロ機構を新規に導入した.
  • Yasunobu Nakase, Shinichi Hirose, Hiroshi Onoda, Yasuhiro Ido, Yoshiaki Shimizu, Tsukasa Oishi, Toshio Kumamoto, Toru Shimizu
    IEEE Journal of Solid-State Circuits, vol.48(8) pp.1933-1942, Aug, 2013  Peer-reviewed
  • Yasunobu Nakase, Yasuhiro Ido, Tsukasa Oishi, Toshio Kumamoto, Toru Shimizu
    PROCEEDINGS OF THE 2013 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC), 41-44, 2013  Peer-reviewed
    An SIDO boost DC-DC converter operating with a wide input voltage range is proposed for sensor network applications. As the input voltage becomes lower, the inductor current is restricted by on-resistance of a driver transistor. Therefore, longer Ton period does not indicate a lager inductor current. In this condition, Ton period for the lowest input voltage operation is determined as the inductor current reaches 85% of its ideal value. The converter should operate in a continuous conduction mode (CCM) to obtain the maximum power from the input. Toff period is set by feed forward control from Ton period to sustain the output voltages. A test chip fabricated by a 190nm CMOS technology operates at the input voltage range from 80mV to 3V with maintaining the two output voltages of 3V and 5V, respectively. This means that the power of 625 mu W is substantially supplied from the input of 80mV for inner circuits.
  • Kazuaki Deguchi, Naoko Suwa, Masao Ito, Toshio Kumamoto, Takahiro Miki
    IEEE Journal of Solid-State Circuits, vol.43(10) pp.2303-2310, Oct, 2008  Peer-reviewed
    超高速の並列形ADC開発
  • J.Morizio, M.Hoke, T. Kocak, C.Geddie, C. Hughes, J. Perry, S.Madhavapeddi, M.Hood, G.Lynch, H.Kondoh, T.Kumamoto, T.Okuda, H.Noda, M.Ishiwaki, T.Miki, M.Nakaya
    IEEE Journal of Solid-State Circuits, vol.35(7) pp.968-976, Jul, 2000  Peer-reviewed
    通信用のADCとして、カスケード構成の4次と6次のデルタシグマ方式ADCをスイッチトキャパシタ回路で試作。

Presentations

 44

Professional Memberships

 4

Social Activities

 1

研究テーマ

 1
  • 研究テーマ(英語)
    センサ対応アナログフロントエンド回路
    キーワード(英語)
    アナログディジタル変換器、ディジタルアナログ変換器
    概要(英語)
    微小なセンサ出力を読み出すアナログ回路の研究