Researcher Search Results Gou Hosoya Gou Hosoya (細谷 剛) Please select the form format to download from below 「Education and research environment」format 「No. 4, the Ministry of Education document style ①Outline for Vitae」format 「No. 4, the Ministry of Education document style ②Education and research environment」format 「List of Research Themes」format Profile Information AffiliationAssociate Professor, Faculty of Engineering, Osaka Sangyo UniversityDegreeDoctor of Engineering(Dec, 2008, Waseda University)J-GLOBAL ID200901046693783710researchmap Member ID6000009493External linkhttp://www.geocities.jp/ghsy1979/index.html Research Interests 1 Information Theory, Coding Theory Research Areas 1 Informatics / Information theory / Research History 6 Apr, 2024 - Present Associate Professor, Osaka Sangyo University Apr, 2020 - Mar, 2024 Assistant Professor, Global Education Center, Waseda University Apr, 2017 - Mar, 2020 Junior Associate Professor, Faculty of Engineering Department of Information and Computer Technology, Tokyo University of Science Apr, 2016 - Mar, 2017 Assistant Professor, Faculty of Engineering Department of Information and Computer Technology, Tokyo University of Science Apr, 2012 - Mar, 2016 Assistant Professor, Faculty of Engineering, Division 1, Department of Management Science, Tokyo University of Science More Education 3 - 2008 Major in Industrial and Management Systems Engineering, Graduate School, Division of Science and Engineering, Waseda University - 2004 Major in Industrial and Management Systems Engineering, Graduate School, Division of Science and Engineering, Waseda University - 2002 Department of Industrial and Management System Engineering, Faculty of Science and Engineering, Waseda University Committee Memberships 30 Jun, 2023 - Jun, 2025 研究専門委員会 (幹事), 電子情報通信学会情報理論研究会 Jul, 2022 - Nov, 2024 Publication Chair, 2024 International Symposium on Information Theory and its Applications (ISITA2024) Jun, 2020 - Jun, 2024 IEICE Trans. on Fundamentals, Associate Editor, ESS, IEICE Jan, 2022 - Dec, 2023 Secretary, IEEE Information Theory Society Japan Chapter Apr, 2023 - Sep, 2023 TPC Member, 2023 IEEE 34st Annual International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC'23) More Awards 6 Jun, 2022 Best Paper Award, IEICE Communications Society, 2021, A Novel Concatenation Scheme of Protograph-Based LDPC Codes and Markers for Recovering Synchronous Errors Ryo SHIBATA, Gou HOSOYA, Hiroyuki YASHIMA Oct, 2021 Best Paper Award, Analysis of Delayed Bit-Interleaved Coded Modulation for APSK, The 20th International Symposium on Communications and Information Technologies (ISCIT 2021) Gou Hosoya Sep, 2021 貢献賞 (ソサイエティ運営), 電子情報通信学会 基礎・境界ソサイエティ Jun, 2020 IEICE Best Paper Award 2019, Joint iterative decoding of spatially coupled low-density parity-check codes for position errors in racetrack memories, The Institute of Electronics, Information and Communication Engineers R. Shibata, G. Hosoya, H. Yashima Oct, 2010 IEEE Information Theory Society Japan Chapter, Travel Support Award for Young Researchers Mar, 2007 2006年度 早稲田大学 大川記念論文賞 1 Papers 70 Reduction of delay for delayed bit-interleaved coded modulation G. Hosoya Proc. 2022 International Symposium on Information Theory (ISIT2022), 3127-3132, Jun, 2022 Peer-reviewedLead author Analysis of Delayed Bit-Interleaved Coded Modulation for APSK G. Hosoya Proc. of 2021 20th International Symposium on Communications and Information Technologies (ISCIT), 193-198, Oct, 2021 Peer-reviewedLead author Concatenated LDPC/trellis codes: Surpassing the symmetric information rate of channels with synchronization errors Ryo Shibata, Gou Hosoya, Hiroyuki Yashima IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 103(11) 1283-1291, Nov, 2020 Copyright © 2020 The Institute of Electronics, Information and Communication Engineers. We propose a coding/decoding strategy that surpasses the symmetric information rate of a binary insertion/deletion (ID) channel and approaches the Markov capacity of the channel. The proposed codes comprise inner trellis codes and outer irregular low-density parity-check (LDPC) codes. The trellis codes are designed to mimic the transition probabilities of a Markov input process that achieves a high information rate, whereas the LDPC codes are designed to maximize an iterative decoding threshold in the superchannel (concatenation of the ID channels and trellis codes). Performance of non-binary LDPC codes on two-dimensional array erasure models G. Hosoya, T. Niinomi 2020 International Symposium on Information Theory and its Applications, 220-224, Oct, 2020 Peer-reviewedLead author Design and construction of irregular LDPC codes for channels with synchronization errors: New aspect of degree profiles Ryo Shibata, Gou Hosoya, Hiroyuki Yashima IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E103A(10) 1237-1247, Oct 1, 2020 Copyright © 2020 The Institute of Electronics, Information and Communication Engineers Over the past two decades, irregular low-density parity-check (LDPC) codes have not been able to decode information corrupted by insertion and deletion (ID) errors without markers. In this paper, we bring to light the existence of irregular LDPC codes that approach the symmetric information rates (SIR) of the channel with ID errors, even without markers. These codes have peculiar shapes in their check-node degree distributions. Specifically, the check-node degrees are scattered and there are degree-2 check nodes. We propose a code construction method based on the progressive edge-growth algorithm tailored for the scattered check-node degree distributions, which enables the SIR-approaching codes to progress in the finite-length regime. Moreover, the SIR-approaching codes demonstrate asymptotic and finite-length performance that outperform the existing counterparts, namely, concatenated coding of irregular LDPC codes with markers and spatially coupled LDPC codes. More Misc. 92 二乗ユークリッド距離の調和平均に基づいた符号化変調容量を達成する変調法 細谷 剛 電子情報通信学会技術研究報告, 123(14) 49-54, May, 2023 Lead author 符号化変調容量を達成する符号化変調法に関する一考察 細谷 剛 第45回情報理論とその応用シンポジウム予稿集(SITA2022), 109-114, Nov, 2022 Lead author 遅延型ビット置換符号化変調のラベル付け法 細谷 剛 電子情報通信学会技術研究報告, 122(25) 44-49, May, 2022 Lead author A Study on Delayed Bit-Interleaved Coded Modulation G. Hosoya Proc. of 44th Symposium on Information Theory and Its Application, 264-269, Dec, 2021 Lead author Construction of Irregular Polar Code with Gaussian Approximation Yusuke Oki, Gou Hosoya, Hiroyuki Yashima 119(3766) 167-172, Jan, 2020 More Books and Other Publications 1 理工系の基礎 情報工学 赤倉 貴子, 池口 徹, 谷口 行信, 浜田 知久馬, 古川 利博, 八嶋 弘幸, 池辺 淑子, 塩濱 敬之, 寒水 孝司, 立川 智章, 細谷 剛, 石井 隆稔, 奥野 貴之, 佐藤 寛之, 島田 裕, 高橋 智博, 藤原 寛太郎, 太原 育夫, 宮部 博史, 渡邉 均, 藤沢 匡哉 (Role: Contributor) 丸善出版, Apr 30, 2018 (ISBN: 9784621302859) Presentations 131 A Study on Modulation Scheme Achieving Coded Modulation Capacity G. Hosoya 45th Symposium on Information Theory and Its Applications, Nov 30, 2022 A method of assigning bit labeling for delayed bit-interleaved coded modulation G. Hosoya May, 2022 Performance of non-minary LDPC codes on two-dimensional array erasure models G. Hosoya, T. Niinomi 2020 International Symposium on Information Theory and its Applications, Oct 24, 2020 Construction of Irregular Polar Code with Gaussian Approximation Yusuke Oki, Gou Hosoya, Hiroyuki Yashima Technical Committee Workshops on Information Theory, Jan 23, 2020 Design of irregular LDPC codes without markers for insertion/deletion channels R. Shibata, G. Hosoya, H. Yashima 2019 IEEE Global Communications Conference, Dec 9, 2019 More Professional Memberships 3 Sep, 2021 - Present Information Processing Society of Japan (IPSJ) Jul, 2004 - Present The Institute of Electronics, Information and Communication Engineers (IEICE) 2004 - Present Institute of Electrical and Electronics Engineers (IEEE) Research Projects 12 ミスマッチ復号における自動再送要求方式およびリスト復号法に関する研究 科学研究費助成事業, 日本学術振興会, Apr, 2023 - Mar, 2026 新家 稔央, 八木 秀樹, 細谷 剛 Development of Coding Schemes for Position Errors Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), Japan Society for the Promotion of Science, Apr, 2019 - Mar, 2022 Hosoya Gou Evaluation of error exponents and reducing complexity on the decision feedback schemes using linear codes and LDPC codes Grants-in-Aid for Scientific Research, Japan Society for the Promotion of Science, Apr, 2017 - Mar, 2020 NIINOMI Toshihiro All Optical CDMA with interference cancellation and security Grants-in-Aid for Scientific Research, Japan Society for the Promotion of Science, Apr, 2017 - Mar, 2020 Yashima Hiroyuki High Efficient Coded Modulation Schemes Using Error Correcting Codes Grants-in-Aid for Scientific Research Grant-in-Aid for Young Scientists (B), Japan Society for the Promotion of Science, Apr, 2016 - Mar, 2019 Hosoya Gou More 研究テーマ 3 研究テーマ(英語) 情報通信 研究期間(開始)(英語) 2008/04/01 研究テーマ(英語) 情報学基礎論 研究期間(開始)(英語) 2008/04/01 研究テーマ(英語) 情報理論 研究期間(開始)(英語) 2008/04/01 1
Gou Hosoya (細谷 剛) Please select the form format to download from below 「Education and research environment」format 「No. 4, the Ministry of Education document style ①Outline for Vitae」format 「No. 4, the Ministry of Education document style ②Education and research environment」format 「List of Research Themes」format Profile Information AffiliationAssociate Professor, Faculty of Engineering, Osaka Sangyo UniversityDegreeDoctor of Engineering(Dec, 2008, Waseda University)J-GLOBAL ID200901046693783710researchmap Member ID6000009493External linkhttp://www.geocities.jp/ghsy1979/index.html Research Interests 1 Information Theory, Coding Theory Research Areas 1 Informatics / Information theory / Research History 6 Apr, 2024 - Present Associate Professor, Osaka Sangyo University Apr, 2020 - Mar, 2024 Assistant Professor, Global Education Center, Waseda University Apr, 2017 - Mar, 2020 Junior Associate Professor, Faculty of Engineering Department of Information and Computer Technology, Tokyo University of Science Apr, 2016 - Mar, 2017 Assistant Professor, Faculty of Engineering Department of Information and Computer Technology, Tokyo University of Science Apr, 2012 - Mar, 2016 Assistant Professor, Faculty of Engineering, Division 1, Department of Management Science, Tokyo University of Science More Education 3 - 2008 Major in Industrial and Management Systems Engineering, Graduate School, Division of Science and Engineering, Waseda University - 2004 Major in Industrial and Management Systems Engineering, Graduate School, Division of Science and Engineering, Waseda University - 2002 Department of Industrial and Management System Engineering, Faculty of Science and Engineering, Waseda University Committee Memberships 30 Jun, 2023 - Jun, 2025 研究専門委員会 (幹事), 電子情報通信学会情報理論研究会 Jul, 2022 - Nov, 2024 Publication Chair, 2024 International Symposium on Information Theory and its Applications (ISITA2024) Jun, 2020 - Jun, 2024 IEICE Trans. on Fundamentals, Associate Editor, ESS, IEICE Jan, 2022 - Dec, 2023 Secretary, IEEE Information Theory Society Japan Chapter Apr, 2023 - Sep, 2023 TPC Member, 2023 IEEE 34st Annual International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC'23) More Awards 6 Jun, 2022 Best Paper Award, IEICE Communications Society, 2021, A Novel Concatenation Scheme of Protograph-Based LDPC Codes and Markers for Recovering Synchronous Errors Ryo SHIBATA, Gou HOSOYA, Hiroyuki YASHIMA Oct, 2021 Best Paper Award, Analysis of Delayed Bit-Interleaved Coded Modulation for APSK, The 20th International Symposium on Communications and Information Technologies (ISCIT 2021) Gou Hosoya Sep, 2021 貢献賞 (ソサイエティ運営), 電子情報通信学会 基礎・境界ソサイエティ Jun, 2020 IEICE Best Paper Award 2019, Joint iterative decoding of spatially coupled low-density parity-check codes for position errors in racetrack memories, The Institute of Electronics, Information and Communication Engineers R. Shibata, G. Hosoya, H. Yashima Oct, 2010 IEEE Information Theory Society Japan Chapter, Travel Support Award for Young Researchers Mar, 2007 2006年度 早稲田大学 大川記念論文賞 1 Papers 70 Reduction of delay for delayed bit-interleaved coded modulation G. Hosoya Proc. 2022 International Symposium on Information Theory (ISIT2022), 3127-3132, Jun, 2022 Peer-reviewedLead author Analysis of Delayed Bit-Interleaved Coded Modulation for APSK G. Hosoya Proc. of 2021 20th International Symposium on Communications and Information Technologies (ISCIT), 193-198, Oct, 2021 Peer-reviewedLead author Concatenated LDPC/trellis codes: Surpassing the symmetric information rate of channels with synchronization errors Ryo Shibata, Gou Hosoya, Hiroyuki Yashima IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 103(11) 1283-1291, Nov, 2020 Copyright © 2020 The Institute of Electronics, Information and Communication Engineers. We propose a coding/decoding strategy that surpasses the symmetric information rate of a binary insertion/deletion (ID) channel and approaches the Markov capacity of the channel. The proposed codes comprise inner trellis codes and outer irregular low-density parity-check (LDPC) codes. The trellis codes are designed to mimic the transition probabilities of a Markov input process that achieves a high information rate, whereas the LDPC codes are designed to maximize an iterative decoding threshold in the superchannel (concatenation of the ID channels and trellis codes). Performance of non-binary LDPC codes on two-dimensional array erasure models G. Hosoya, T. Niinomi 2020 International Symposium on Information Theory and its Applications, 220-224, Oct, 2020 Peer-reviewedLead author Design and construction of irregular LDPC codes for channels with synchronization errors: New aspect of degree profiles Ryo Shibata, Gou Hosoya, Hiroyuki Yashima IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E103A(10) 1237-1247, Oct 1, 2020 Copyright © 2020 The Institute of Electronics, Information and Communication Engineers Over the past two decades, irregular low-density parity-check (LDPC) codes have not been able to decode information corrupted by insertion and deletion (ID) errors without markers. In this paper, we bring to light the existence of irregular LDPC codes that approach the symmetric information rates (SIR) of the channel with ID errors, even without markers. These codes have peculiar shapes in their check-node degree distributions. Specifically, the check-node degrees are scattered and there are degree-2 check nodes. We propose a code construction method based on the progressive edge-growth algorithm tailored for the scattered check-node degree distributions, which enables the SIR-approaching codes to progress in the finite-length regime. Moreover, the SIR-approaching codes demonstrate asymptotic and finite-length performance that outperform the existing counterparts, namely, concatenated coding of irregular LDPC codes with markers and spatially coupled LDPC codes. More Misc. 92 二乗ユークリッド距離の調和平均に基づいた符号化変調容量を達成する変調法 細谷 剛 電子情報通信学会技術研究報告, 123(14) 49-54, May, 2023 Lead author 符号化変調容量を達成する符号化変調法に関する一考察 細谷 剛 第45回情報理論とその応用シンポジウム予稿集(SITA2022), 109-114, Nov, 2022 Lead author 遅延型ビット置換符号化変調のラベル付け法 細谷 剛 電子情報通信学会技術研究報告, 122(25) 44-49, May, 2022 Lead author A Study on Delayed Bit-Interleaved Coded Modulation G. Hosoya Proc. of 44th Symposium on Information Theory and Its Application, 264-269, Dec, 2021 Lead author Construction of Irregular Polar Code with Gaussian Approximation Yusuke Oki, Gou Hosoya, Hiroyuki Yashima 119(3766) 167-172, Jan, 2020 More Books and Other Publications 1 理工系の基礎 情報工学 赤倉 貴子, 池口 徹, 谷口 行信, 浜田 知久馬, 古川 利博, 八嶋 弘幸, 池辺 淑子, 塩濱 敬之, 寒水 孝司, 立川 智章, 細谷 剛, 石井 隆稔, 奥野 貴之, 佐藤 寛之, 島田 裕, 高橋 智博, 藤原 寛太郎, 太原 育夫, 宮部 博史, 渡邉 均, 藤沢 匡哉 (Role: Contributor) 丸善出版, Apr 30, 2018 (ISBN: 9784621302859) Presentations 131 A Study on Modulation Scheme Achieving Coded Modulation Capacity G. Hosoya 45th Symposium on Information Theory and Its Applications, Nov 30, 2022 A method of assigning bit labeling for delayed bit-interleaved coded modulation G. Hosoya May, 2022 Performance of non-minary LDPC codes on two-dimensional array erasure models G. Hosoya, T. Niinomi 2020 International Symposium on Information Theory and its Applications, Oct 24, 2020 Construction of Irregular Polar Code with Gaussian Approximation Yusuke Oki, Gou Hosoya, Hiroyuki Yashima Technical Committee Workshops on Information Theory, Jan 23, 2020 Design of irregular LDPC codes without markers for insertion/deletion channels R. Shibata, G. Hosoya, H. Yashima 2019 IEEE Global Communications Conference, Dec 9, 2019 More Professional Memberships 3 Sep, 2021 - Present Information Processing Society of Japan (IPSJ) Jul, 2004 - Present The Institute of Electronics, Information and Communication Engineers (IEICE) 2004 - Present Institute of Electrical and Electronics Engineers (IEEE) Research Projects 12 ミスマッチ復号における自動再送要求方式およびリスト復号法に関する研究 科学研究費助成事業, 日本学術振興会, Apr, 2023 - Mar, 2026 新家 稔央, 八木 秀樹, 細谷 剛 Development of Coding Schemes for Position Errors Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), Japan Society for the Promotion of Science, Apr, 2019 - Mar, 2022 Hosoya Gou Evaluation of error exponents and reducing complexity on the decision feedback schemes using linear codes and LDPC codes Grants-in-Aid for Scientific Research, Japan Society for the Promotion of Science, Apr, 2017 - Mar, 2020 NIINOMI Toshihiro All Optical CDMA with interference cancellation and security Grants-in-Aid for Scientific Research, Japan Society for the Promotion of Science, Apr, 2017 - Mar, 2020 Yashima Hiroyuki High Efficient Coded Modulation Schemes Using Error Correcting Codes Grants-in-Aid for Scientific Research Grant-in-Aid for Young Scientists (B), Japan Society for the Promotion of Science, Apr, 2016 - Mar, 2019 Hosoya Gou More 研究テーマ 3 研究テーマ(英語) 情報通信 研究期間(開始)(英語) 2008/04/01 研究テーマ(英語) 情報学基礎論 研究期間(開始)(英語) 2008/04/01 研究テーマ(英語) 情報理論 研究期間(開始)(英語) 2008/04/01 1